JPH0563937B2 - - Google Patents

Info

Publication number
JPH0563937B2
JPH0563937B2 JP18744991A JP18744991A JPH0563937B2 JP H0563937 B2 JPH0563937 B2 JP H0563937B2 JP 18744991 A JP18744991 A JP 18744991A JP 18744991 A JP18744991 A JP 18744991A JP H0563937 B2 JPH0563937 B2 JP H0563937B2
Authority
JP
Japan
Prior art keywords
strip
support plate
section
resin
small cross
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP18744991A
Other languages
English (en)
Japanese (ja)
Other versions
JPH04340237A (ja
Inventor
Takaaki Yokoyama
Yoshiharu Tada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP18744991A priority Critical patent/JPH04340237A/ja
Publication of JPH04340237A publication Critical patent/JPH04340237A/ja
Publication of JPH0563937B2 publication Critical patent/JPH0563937B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP18744991A 1991-07-26 1991-07-26 樹脂封止形半導体装置の製造方法 Granted JPH04340237A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18744991A JPH04340237A (ja) 1991-07-26 1991-07-26 樹脂封止形半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18744991A JPH04340237A (ja) 1991-07-26 1991-07-26 樹脂封止形半導体装置の製造方法

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP1086912A Division JPH0249445A (ja) 1989-04-07 1989-04-07 樹脂封止形半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPH04340237A JPH04340237A (ja) 1992-11-26
JPH0563937B2 true JPH0563937B2 (en]) 1993-09-13

Family

ID=16206272

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18744991A Granted JPH04340237A (ja) 1991-07-26 1991-07-26 樹脂封止形半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPH04340237A (en])

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4953205B2 (ja) * 2007-05-01 2012-06-13 三菱電機株式会社 半導体装置
JP5281797B2 (ja) * 2008-01-22 2013-09-04 アスモ株式会社 樹脂封止型半導体装置
JP5091832B2 (ja) * 2008-10-28 2012-12-05 新電元工業株式会社 リードフレーム及び半導体装置

Also Published As

Publication number Publication date
JPH04340237A (ja) 1992-11-26

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees